set up timer with prescaler = 64 and CTC mode initialize timer, interrupt and variable
To learn how this code is structured, view the previous TIMER0 post.
To learn how to use AVR Studio 5, view this. To know about bit manipulations, view this. To learn about I/O port operations in AVR, view this. Now that we are aware of the methodology and the registers, we can proceed to write the code for it. Alternatively, it can be cleared by writing ‘1’ to it! Code It is cleared automatically whenever the corresponding Interrupt Service Routine (ISR) is executed. This bit is set (one) by the AVR whenever a match occurs i.e. We are interested in Bit 4:3 – OCF1A:B – Timer/Counter1, Output Compare A/B Match Flag Bit. The Timer/Counter1 Control Register A – TCCR1A Register is as follows:
Okay, so now let me introduce you to the register bits which help you to implement this CTC Mode. Confused, eh? Well, don’t worry, just read on! ) Now, the same will be done in hardware! We won’t check its value every time in software! We will simply check whether the flag bit is set or not, that’s all. Up until now, we would have let the value of the timer increment, and check its value every iteration, whether it’s equal to 24999 or not, and then reset the timer.
With a Required Delay = 100 ms, we get the Timer Count to be equal to 24999. Now, given XTAL = 16 MHz, with a prescaler of 64, the frequency of the clock pulse reduces to 250 kHz. I won’t be revising the basic concepts here, just their application. I also recommend you to read my TIMER0 tutorial in order to understand this better. Methodology – Using CTC Modeīefore proceeding any further, let’s jot down the formula first. Let’s take up a problem statement to understand this concept. Let us analyze this CTC Mode in detail with the help of a problem statement. Hence, this comparison takes place in the hardware itself, inside the AVR CPU! Once the process value becomes equal to the set point, a flag in the status register is set and the timer is reset automatically! Thus goes the name – CTC – Clear Timer on Compare! Thus, all we need to do is to take care of the flag, which is much more faster to execute. no missed compares, no double increment, etc). Which means that we no longer need to worry about comparing the process value with the set point every time! This will not only avoid unnecessary wastage of cycles, but also ensure greater accuracy (i.e. So basically, the CTC Mode implements the same thing, but unlike the above example, it implements it in hardware. Here, what we desire is that the timer (process value) should reset as soon as its value becomes equal to (or greater than) the set point of 39999. Since TIMER1 is a 16-bit timer, it can count upto a maximum of 65535. Here, we have used the example of TIMER1. Max = 39999 // max timer value set = max) // process value compared with the set point Once the process value becomes equal (or exceeds) the set point, the process value is reset.
In every iteration, we used to compare the process value with the set point. We had two timer values with us – Set Point (SP) and Process Value (PV). So till now, we have dealt with the basic concepts. In this post, we will discuss about a special mode of operation – Clear Timer on Compare (CTC) Mode. The basic concepts of timers and its applications have been discussed in earlier posts. Till now, we have covered the following topics in AVR Timers: Hello friends! Welcome to the another tutorial on AVR Timers.